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AS4C64M8D2-25BCN

Name: Alliance Memory AS4C64M8D2-25BCN
Brand: Alliance Memory
SKU: 913-AS4C64M8D2-25BCN
Price: 5.17 GBP
Availability: InStock

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Mouser No:

913-AS4C64M8D2-25BCN

Mfr. No:

AS4C64M8D2-25BCN

Mfr.:

Alliance Memory

Description:

DRAM DDR2, 512Mb, 64M x 8, 1.8V, 400Mhz, 60-ball FBGA, Commercial Temp - Tray

Datasheet:

AS4C64M8D2-25BCN Datasheet (PDF)

ECAD Model:

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More Information

Learn more about Alliance Memory AS4C64M8D2-25BCN

In Stock: 69

Stock:: 69 Can Dispatch Immediately

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Factory Lead Time:: 8 Weeks Estimated factory production time for quantities greater than shown.

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Ext. Price:

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Pricing (GBP)

Qty.	Unit Price	Ext. Price
	£5.17	£5.17
	£4.81	£48.10
	£4.67	£116.75
	£4.56	£228.00
	£4.36	£436.00
	£4.09	£1,079.76
	£4.00	£2,112.00
	£3.90	£4,118.40
	£3.72	£9,820.80

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Product Attribute	Attribute Value	Select Attribute
Manufacturer:	Alliance Memory
Product Category:	DRAM
RoHS:
Type:	SDRAM - DDR2
Memory Size:	512 Mbit
Data Bus Width:	8 bit
Maximum Clock Frequency:	400 MHz
Package/Case:	FBGA-60
Organisation:	64 M x 8
Access Time:	400 ps
Supply Voltage - Min:	1.7 V
Supply Voltage - Max:	1.9 V
Minimum Operating Temperature:	0 C
Maximum Operating Temperature:	+ 85 C
Series:	AS4C64M8D2
Packaging:	Tray
Brand:	Alliance Memory
Country of Assembly:	Not Available
Country of Diffusion:	Not Available
Country of Origin:	TW
Moisture Sensitive:	Yes
Mounting Style:	SMD/SMT
Product Type:	DRAM
Factory Pack Quantity:	264
Subcategory:	Memory & Data Storage
Supply Current - Max:	85 mA

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Datasheet

AS4C64M8D2-25BCN Datasheet (PDF)

REACH Declaration (PDF)

CNHTS:: 8542319090
USHTS:: 8542320028
JPHTS:: 854232021
KRHTS:: 8542321010
MXHTS:: 8542320201
ECCN:: EAR99

DDR2 SDRAM

Alliance Memory DDR2 SDRAM is designed to comply with DDR2 SDRAM key features. Features such as posted CAS# with additive latency, Write latency=Read latency -1, and On-Die Termination (ODT). All of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and CK# falling). All I/Os are synchronized with a pair of bidirectional strobes (DQS and DQS#) in a source synchronous fashion. The address bus is used to convey row, column, and bank address information in RAS #, CAS# multiplexing style.